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---
license: apache-2.0
task_categories:
  - text-generation
tags:
  - gpu-kernels
  - pallas
  - jax
  - benchmark
  - a100
  - triton
  - robust-evaluation
  - kernel-optimization
pretty_name: PallasBench Robust GPU Kernel Benchmark (A100)
size_categories:
  - n<1K
language:
  - en
---

# PallasBench: Robust Pallas GPU Kernel Benchmark (A100)

**39/45 kernels passing** on NVIDIA A100 80GB -- the first GPU-focused evaluation of JAX Pallas kernels.

## What is this?

PallasBench is a suite of 45 JAX Pallas kernels across 3 difficulty levels. The original kernels were designed for **TPU** and failed on GPU because Pallas compiles to Triton on NVIDIA hardware, which has strict block size limits that TPU's Mosaic compiler does not.

We fixed all 45 kernels for GPU compatibility and evaluated them on an A100 with correctness checking, timing, and compilation profiling.

## Why does this matter?

**Pallas is the only kernel DSL that targets both GPU and TPU from a single source.** There are many CUDA and Triton kernel benchmarks (KernelBench, robust-kbench, KernelBot), but no Pallas benchmark existed with GPU results. This dataset fills that gap.

The kernels are **correct but unoptimized** -- they represent what an LLM would generate when writing Pallas code without GPU-specific tuning. This makes them ideal as the initial population for evolutionary kernel optimization (e.g., ShinkaEvolve).

## Inspiration

This work follows the methodology of:
- [SakanaAI/AI-CUDA-Engineer-Archive](https://huggingface.co/datasets/SakanaAI/AI-CUDA-Engineer-Archive) -- CUDA kernel archive with profiling data
- [robust-kbench](https://github.com/SakanaAI/robust-kbench) -- robust kernel evaluation with anti-gaming filters
- [KernelBench](https://huggingface.co/datasets/ScalingIntelligence/KernelBench) -- LLM kernel generation benchmark

We adapt their evaluation methodology to the JAX/Pallas compilation pipeline.

## The GPU Fix

PallasBench kernels used TPU-sized blocks like (1024, 4096) = 4M elements per block. On GPU, Pallas compiles through Triton, which:
- Limits blocks to 1,048,576 elements
- Unrolls the block into PTX instructions (1M elements = 10MB PTX = hours of ptxas compilation)
- Has 164KB shared memory per SM (vs 16-32MB VMEM on TPU)

Our fix: **2D tiling with (128, 128) or (16, 16) blocks** depending on the kernel pattern. This reduces PTX size from 10MB to ~300KB and compile time from hours to seconds.

## Results Summary

| Level | Total | Pass | Error | Skip |
|-------|-------|------|-------|------|
| L1: Single ops | 27 | 25 | 1 | 0 |
| L2: Fused patterns | 13 | 10 | 2 | 0 |
| L3: Architecture | 5 | 3 | 1 | 2 |
| **Total** | **45** | **39 (87%)** | **4** | **2** |

### Remaining failures

| Kernel | Issue | Root cause |
|--------|-------|------------|
| embedding_lookup | Triton non-array ops | Integer indexing not supported in Triton |
| pwm_scan | Triton non-array ops | Scan with non-array state |
| pairwise_distance | reduce_sum lowering | Nested reduction not supported |
| triangle_update | reduce_sum lowering | Same |
| gated_mlp | Weight matrices >1M elements | Would need K-tiled accumulator loop |
| transformer_block | Combines all patterns | Needs full decomposition |

These are **JAX/Triton integration limitations**, not block size issues.

## Files

| File | Description |
|------|-------------|
|  | Complete results for all 45 kernels |
|  | SakanaAI/AI-CUDA-Engineer-Archive compatible format |
|  | Complete git diff of all GPU fixes |
|  | Robust evaluation framework (5 filters, tiling analysis, IR capture) |
|  | Pre-fix kernel source (TPU-oriented) |
|  | GPU-compatible kernel source |

## SakanaAI Format Schema

Each row in  contains:

| Field | Type | Description |
|-------|------|-------------|
| Op_Name | string | Kernel name (e.g. relu, flash_attention) |
| Level_ID | int | 1-3 |
| Task_ID | int | Sequential ID |
| Pallas_Runtime | float | Kernel execution time (ms), includes JIT |
| JAX_Baseline_Runtime | float | JAX jnp baseline time (ms) |
| Pallas_Speedup | float | baseline / kernel |
| Pallas_Code | string | Full fixed Pallas kernel source |
| Pallas_Code_Original | string | Original TPU-oriented source |
| JAX_Baseline_Code | string | JAX reference implementation |
| Correct | bool | Matches baseline within atol=1e-3 |
| Error | string | Error message if failed |
| Target_Hardware | string | NVIDIA A100 80GB PCIe |
| Framework | string | jax.experimental.pallas |
| Backend | string | triton |
| Fix_Applied | string | Type of fix (2D tiling, block_rows clamped, etc) |

## Hardware

| Component | Specification |
|-----------|---------------|
| GPU | NVIDIA A100 80GB PCIe |
| SMs | 108 |
| HBM Bandwidth | 2,039 GB/s |
| L2 Cache | 40 MB |
| Shared Memory | 164 KB/SM |
| Compute | 8.0 |
| Instance | Azure Standard_NC24ads_A100_v4 |
| RAM | 216 GB |
| JAX | 0.10.1 |
| Triton | 3.7.0 |

## Provenance

- **Source**: [PallasBench](https://github.com/Tyronita/PallasBench) by Tyronita
- **Evaluation methodology**: Adapted from [robust-kbench](https://github.com/SakanaAI/robust-kbench) by SakanaAI
- **Dataset format**: Follows [AI-CUDA-Engineer-Archive](https://huggingface.co/datasets/SakanaAI/AI-CUDA-Engineer-Archive) schema

## Citation

Need exactly one file argument

## License

Apache 2.0