EdgeFirst/yolo26-seg

YOLO26 Segmentation — EdgeFirst Model Zoo

YOLO26 Segmentation models trained on COCO 2017 (80 classes) and validated on real edge hardware with the EdgeFirst Profiler, which runs the pipeline and computes the accuracy on the device itself. Each row in the tables below cites the EdgeFirst Studio validation session (v-XXXX) that produced the measurement.

Part of the EdgeFirst Model Zoo. New here? Introducing the EdgeFirst Model Zoo covers what is in the zoo, why every figure links to its validation session, and how to reproduce any of it on your own hardware. Want a platform, model or task we don't cover yet? Vote on what we measure next.

Training experiment: View on EdgeFirst Studio — dataset, training configuration, metrics, and exported artifacts. Rows badged 2026 Q2 come from the 2026 Q2 training experiment, whose weights the repository's 2026Q2 tag holds.

End-to-end attention head. end2end=False required for INT8 export.

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Reference accuracy — ONNX FP32

Accuracy ceiling for each size, measured against COCO val2017 (5,000 images) with pycocotools. Quantized and compiled artifacts (TFLite INT8, HEF, etc.) are graded against this reference per the EdgeFirst publication rule.

Size	Params	GFLOPs	Box mAP@0.5	Box mAP@0.5-0.95	Mask mAP@0.5	Mask mAP@0.5-0.95	Source
Nano	2.7M	7.6	56.06%	40.13%	53.09%	33.25%	v-195b
Small	10.3M	27.0	64.44%	47.58%	61.09%	38.71%	v-195f
Medium	24.5M	74.4	69.85%	52.59%	66.39%	42.48%	v-1964
Large	42.5M	155.0	—	—	—	—	—
XLarge	67.5M	244.0	—	—	—	—	—

Sizes. The EdgeFirst Model Zoo currently validates Nano, Small, and Medium. The Large and XLarge variants are not evaluated at this time — their parameter and GFLOP counts are listed above for reference, with accuracy shown as —.

Accuracy methodology & relation to Ultralytics

Every model in this zoo uses the official Ultralytics pretrained weights, byte-for-byte — there is no re-training. These are the same models Ultralytics ships, measured on the deployment-realistic path: a fixed-input ONNX graph (square letterbox, rect=False), the standard COCO AP@[maxDets=100] convention, and COCO crowd regions scored as normal detections. Ultralytics' headline COCO numbers use their internal validator (rectangular inference, crowd-ignored, maxDets=300), so a small, fully-explained offset on identical weights is expected — not an accuracy deficit.

The same relationship holds through the shared detection head — see any EdgeFirst detection card for the full three-way reconciliation table. The Mask mAP above is stock pycocotools segmentation AP on identical Ultralytics weights and tracks Ultralytics' official mask figures within a comparable ~1–2 pp deployment-methodology offset.

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On-target validation results

Each row is one EdgeFirst Studio validation session. Click the Source link to inspect the full session — model artifact, dataset version, parameters, per-stage Perfetto trace, and the host hardware description (hostname, kernel version, SoC, NPU, profiler version).

Row conventions in the table below:

• Rows whose Δ cell reads ref are the float reference runs each quantized/compiled measurement is graded against.
• Rows without a number under the metric columns are validation sessions currently in progress, or a session not yet linked to its ONNX FP32 reference. The Studio Source link tracks the current status.
• Rows whose Δ vs FP32 cell carries a ⚠ are below our accuracy expectations for that platform (more than 10 percentage points under the float reference). The numbers are real measurements on real hardware, reproducible from the linked Studio session, and we publish them as-is; we are investigating the results to make improvements, and the next snapshot of this card will reflect any recovered accuracy.
• Edition badges. A Source cell such as v-XXXX · 2026 Q2 marks a result carried from an earlier EdgeFirst Perception Index edition: this configuration was not re-measured on the current weights, so the row keeps the measurement, Studio session and model artifact of the edition that produced it. Rows without a badge come from the current edition.
• Precision varies by target: the ONNX reference rows are FP32; macOS CoreML and NVIDIA Jetson TensorRT run FP16; the NXP i.MX 8M Plus, NXP i.MX 95 Neutron, and Hailo NPUs run INT8. The NXP Ara240 DNPU runs a mixed INT8/INT16 scheme — most of the model is INT8, with the box-regression path (and the ops feeding it) promoted to INT16 to improve localization accuracy.
• Decoder variants. EdgeFirst ships three INT8 split-decoders — smart, logical, and combined (described under Decode below). Every one we have measured is listed; none is headlined over another, because which one wins is a property of the target, not of the variant. Full converter documentation: EdgeFirst model conversion — these are the converters used by this Model Zoo and the EdgeFirst Performance Index report.
• Runtime. Which inference stack executed the model. It is a column of its own because one accelerator can be reached by more than one: on Qualcomm Hexagon HTP, ONNX · QNN EP is an ONNX Runtime EPContext binary while LiteRT is the LiteRT + QNN delegate path, and the two produce measurably different pipelines from the same weights on the same silicon. Compare rows that share a size, platform, precision, and decode to read that difference directly.
• Decode. What the exported graph emits, and therefore what your application has to do with it. Logical keeps the head's outputs separate and named — boxes, scores, and for segmentation the mask prototypes and coefficients — so reading them needs no decoder beyond taking the tensors as they come. Smart cuts the graph further upstream, at a point chosen by dynamic range and sliceability: the operations that quantize worst are lifted out of the model and run outside it, which is what recovers the accuracy, and which is why it needs a decoder implementing that cut (in EdgeFirst deployments, the HAL provides it). Combined fuses the decode into the quantized graph — the standard upstream export. It is the least accurate of the three by construction, and the EdgeFirst converters do not emit it for quantized targets; rows appear only where one was measured. Compare rows sharing a size and platform to see what the cut buys on your target — on detection it is often small, on quantized segmentation masks it is usually decisive. A — means the run carries no quantized decode split at all (float ONNX / TensorRT / CoreML).
• Rows are not ranked. Where a size and platform appear more than once, the rows are competing configurations — a different runtime, precision, decode variant, pipeline mode, or board — not duplicates. Only genuinely repeated measurements of the same configuration are collapsed, newest first.
• Platform-label suffixes. (EVK) / (FRDM) / (Phytec) / (Verdin) / (Ezurio) name the NXP i.MX development board a session ran on. — latency / — throughput mark the two pipeline configurations the NXP i.MX 95 Neutron and NXP Ara240 targets run: the latency pipeline runs inference serially for the lowest per-frame latency; the throughput pipeline runs multiple inference workers for the highest FPS, which raises per-frame latency in exchange. Rows with neither suffix run a single pipeline.
• End-to-end (ms) is the per-image latency from the moment a frame is available to the moment its results are ready: preprocess → inference → postprocess. Image acquisition (camera capture, or file load and JPEG decode), mask encoding and writing results to disk are excluded.
• Realized FPS is the measured steady-state throughput — the rate at which final results are actually delivered over the full validation pipeline. It normally exceeds 1000 / end-to-end because the runtime overlaps stages across frames. Validation runs decode a JPEG per image and evaluate at a 0.001 confidence threshold to capture every detection for mAP; a live camera pipeline at a deployment threshold of 0.25–0.75 carries a lighter host and postprocess load.

Size	Platform	Runtime	Decode	Box mAP@0.5	Mask mAP@0.5-0.95	Δ mask vs FP32 (pp)	End-to-end (ms)	Realized FPS	Source
Nano	ONNX FP32 (AWS Graviton · 4-core)	ONNX	—	56.01%	33.18%	-0.01	343.84	12.2	v-edb · 2026 Q2
Nano	ONNX FP32 (AWS Graviton4 · 48-core)	ONNX	—	56.01%	33.18%	-0.01	114.34	128.9	v-ef5 · 2026 Q2
Nano	ONNX FP32 (AWS Graviton4 · 8-core)	ONNX	—	56.01%	33.18%	-0.01	286.33	28.4	v-ef0 · 2026 Q2
Nano	ONNX FP32 (Intel Core i9-13900F · 32-core)	ONNX	—	56.01%	33.19%	+0.00	65.15	57.1	v-a4b · 2026 Q2
Nano	ONNX FP32 (Intel Xeon Platinum 8488C · 24-core)	ONNX	—	56.01%	33.20%	+0.01	118.60	112.7	v-ec7 · 2026 Q2
Nano	ONNX FP32 (Intel Xeon Platinum 8488C · 4-core)	ONNX	—	56.01%	33.20%	+0.01	222.82	37.8	v-ebd · 2026 Q2
Nano	ONNX FP32 (CUDA · A10G)	ONNX	—	56.00%	33.19%	ref	38.13	133.7	v-ea4 · 2026 Q2
Nano	ONNX FP32 (CUDA · RTX 4060)	ONNX	—	56.01%	33.20%	+0.01	18.08	233.3	v-a8d · 2026 Q2
Nano	ONNX FP16 (CUDA · RTX 4060)	ONNX	—	55.99%	33.20%	+0.01	16.65	291.0	v-aa2 · 2026 Q2
Nano	ONNX FP32 (CUDA · RTX 3090)	ONNX	—	56.06%	33.25%	ref	25.45	202.2	v-195b
Nano	ONNX FP16 (CUDA · RTX 3090)	ONNX	—	56.03%	33.26%	+0.01	21.61	259.4	v-19b9
Nano	Apple M2 Max — CoreML Neural Engine (FP16)	ONNX	—	54.63%	32.47%	-0.72	7.39	457.4	v-732 · 2026 Q2
Nano	Apple M2 Max — CoreML Metal GPU (FP16)	ONNX	—	54.71%	32.48%	-0.71	13.77	305.2	v-73c · 2026 Q2
Nano	Apple M2 Max — CoreML CPU (FP16)	ONNX	—	55.61%	32.97%	-0.22	32.25	71.0	v-9e4 · 2026 Q2
Nano	Apple iPhone 17 Pro — CoreML Neural Engine (FP16)	ONNX	—	55.58%	32.94%	-0.25	21.53	163.2	v-f6a · 2026 Q2
Nano	Apple iPhone 17 Pro — CoreML Metal GPU (FP16)	ONNX	—	55.67%	32.98%	-0.21	29.11	117.0	v-f69 · 2026 Q2
Nano	Apple iPhone 17 Pro — CoreML CPU (FP16)	ONNX	—	55.65%	32.99%	-0.20	45.77	54.0	v-f68 · 2026 Q2
Nano	Apple iPhone 15 Pro — CoreML Neural Engine (FP16)	ONNX	—	55.57%	32.96%	-0.23	26.38	123.8	v-f2b · 2026 Q2
Nano	Apple iPhone 15 Pro — CoreML Metal GPU (FP16)	ONNX	—	55.67%	32.98%	-0.21	48.83	68.5	v-f2c · 2026 Q2
Nano	Apple iPhone 15 Pro — CoreML CPU (FP16)	ONNX	—	55.62%	32.98%	-0.21	58.55	43.0	v-f01 · 2026 Q2
Nano	Samsung Galaxy S26 Ultra — Qualcomm Hexagon NPU (INT8)	ONNX · QNN EP	Smart	48.12%	27.82%	-5.37	31.76	106.9	v-10ab · 2026 Q2
Nano	Samsung Galaxy S26 Ultra — Qualcomm Hexagon NPU (INT8)	ONNX · QNN EP	Logical	24.89%	13.84%	-19.35	9.81	404.5	v-10ae · 2026 Q2
Nano	Samsung Galaxy S26 Ultra — Qualcomm Hexagon NPU (INT16)	ONNX · QNN EP	Smart	52.60%	31.00%	-2.19	40.44	97.1	v-10bd · 2026 Q2
Nano	Samsung Galaxy S26 Ultra — Qualcomm Hexagon NPU (INT16)	ONNX · QNN EP	Logical	51.48%	10.03%	-23.16	23.13	152.2	v-10aa · 2026 Q2
Nano	Samsung Galaxy S26 Ultra — CPU	LiteRT	Smart	51.60%	30.16%	-3.03	143.01	50.7	v-fd7 · 2026 Q2
Nano	NXP i.MX 8M Plus + VeriSilicon NPU (Ezurio) — latency	LiteRT	Logical	40.29%	21.90%	-11.35	367.78	4.3	v-1a9e
Nano	NXP i.MX 8M Plus + VeriSilicon NPU (FRDM)	LiteRT	Combined	17.59%	10.62%	-22.63	140.02	7.6	v-189b
Nano	NXP i.MX 8M Plus + VeriSilicon NPU (FRDM)	LiteRT	Logical	40.29%	21.90%	-11.35	149.34	7.4	v-18bf
Nano	NXP i.MX 8M Plus + VeriSilicon NPU (FRDM)	LiteRT	Smart	42.32%	22.86%	-10.39 ⚠	172.71	7.5	v-18d8
Nano	NXP i.MX 8M Plus + VeriSilicon NPU (Verdin) — latency	LiteRT	Logical	17.17%	10.35%	-22.84	145.21	7.3	v-c89 · 2026 Q2
Nano	NXP i.MX 8M Plus + VeriSilicon NPU (Verdin) — throughput	LiteRT	Smart	41.77%	22.51%	-10.68 ⚠	184.19	7.3	v-c87 · 2026 Q2
Nano	NXP i.MX 95 + eIQ Neutron NPU (Ezurio) — latency	LiteRT	Smart	51.51%	30.08%	-3.17	96.10	21.1	v-16b9
Nano	NXP i.MX 95 + eIQ Neutron NPU (Ezurio) — throughput	LiteRT	Smart	51.51%	30.08%	-3.17	242.91	24.4	v-198a
Nano	NXP i.MX 95 + eIQ Neutron NPU (EVK) — latency	LiteRT	Smart	51.64%	30.12%	-3.13	96.61	21.1	v-18b8
Nano	NXP i.MX 95 + eIQ Neutron NPU (EVK) — latency	LiteRT	Logical	49.79%	29.33%	-3.92	67.36	19.5	v-18a8
Nano	NXP i.MX 95 + eIQ Neutron NPU (EVK) — latency	LiteRT	Combined	27.02%	17.01%	-16.24	61.93	19.1	v-18a0
Nano	NXP i.MX 95 + eIQ Neutron NPU (EVK) — throughput	LiteRT	Smart	51.64%	30.12%	-3.13	218.05	24.4	v-18c3
Nano	NXP i.MX 95 + eIQ Neutron NPU (EVK) — throughput	LiteRT	Logical	49.79%	29.33%	-3.92	161.42	33.1	v-18b1
Nano	NXP i.MX 95 + eIQ Neutron NPU (EVK) — throughput	LiteRT	Combined	27.02%	17.01%	-16.24	114.02	42.3	v-18a6
Nano	NXP i.MX 95 + eIQ Neutron NPU (Phytec) — throughput	LiteRT	Smart	51.64%	30.12%	-3.13	220.58	24.9	v-1b2c
Nano	NXP i.MX 95 + eIQ Neutron NPU (Verdin) — latency	LiteRT	Smart	51.51%	30.08%	-3.17	100.57	20.1	v-16bb
Nano	NXP i.MX 95 + eIQ Neutron NPU (Verdin) — throughput	LiteRT	Smart	51.51%	30.08%	-3.17	255.85	23.2	v-19a5
Nano	NXP Ara240 (FRDM) — latency	Ara DVM	Smart	51.77%	30.21%	-3.04	44.31	50.7	v-169b
Nano	NXP Ara240 (FRDM) — throughput	Ara DVM	Smart	51.76%	30.20%	-3.05	55.32	55.0	v-18fa
Nano	Raspberry Pi 5 + Hailo-8L NPU	Hailo HEF	—	53.08%	31.35%	-1.90	41.87	30.2	v-159a
Nano	NVIDIA Jetson Orin Nano (TensorRT FP16)	TensorRT	—	56.02%	33.26%	+0.01	62.88	107.3	v-175f
Nano	NVIDIA Jetson Orin Nano (TensorRT INT8)	TensorRT	—	53.74%	31.55%	-1.70	64.07	105.1	v-1760
Nano	Qualcomm Dragonwing IQ-9075 — Hexagon NPU (INT8)	ONNX · QNN EP	Smart	53.45%	31.23%	-2.02	21.47	182.4	v-166a
Nano	Qualcomm Dragonwing IQ-9075 — Hexagon NPU (INT8)	ONNX · QNN EP	Logical	52.10%	30.88%	-2.37	16.53	253.1	v-1666
Nano	Qualcomm Dragonwing IQ-9075 — Hexagon NPU (INT16)	ONNX · QNN EP	Smart	55.48%	32.90%	-0.35	31.18	160.5	v-166c
Small	ONNX FP32 (AWS Graviton · 4-core)	ONNX	—	64.44%	38.70%	+0.00	1007.12	4.0	v-edc · 2026 Q2
Small	ONNX FP32 (AWS Graviton4 · 48-core)	ONNX	—	64.44%	38.70%	+0.00	283.14	47.2	v-ef6 · 2026 Q2
Small	ONNX FP32 (AWS Graviton4 · 8-core)	ONNX	—	64.44%	38.70%	+0.00	826.46	9.7	v-ef2 · 2026 Q2
Small	ONNX FP32 (Intel Core i9-13900F · 32-core)	ONNX	—	64.43%	38.69%	-0.01	147.61	21.2	v-a52 · 2026 Q2
Small	ONNX FP32 (Intel Xeon Platinum 8488C · 24-core)	ONNX	—	64.43%	38.69%	-0.01	265.74	52.4	v-ec9 · 2026 Q2
Small	ONNX FP32 (Intel Xeon Platinum 8488C · 4-core)	ONNX	—	64.43%	38.70%	+0.00	514.63	15.8	v-ebe · 2026 Q2
Small	ONNX FP32 (CUDA · A10G)	ONNX	—	64.43%	38.70%	ref	35.40	146.9	v-ea7 · 2026 Q2
Small	ONNX FP32 (CUDA · RTX 4060)	ONNX	—	64.43%	38.70%	+0.00	27.45	148.1	v-a94 · 2026 Q2
Small	ONNX FP16 (CUDA · RTX 4060)	ONNX	—	64.43%	38.66%	-0.04	22.56	208.0	v-aa9 · 2026 Q2
Small	ONNX FP32 (CUDA · RTX 3090)	ONNX	—	64.44%	38.71%	ref	26.11	200.5	v-195f
Small	ONNX FP16 (CUDA · RTX 3090)	ONNX	—	64.41%	38.68%	-0.03	21.42	267.7	v-19ba
Small	Apple M2 Max — CoreML Neural Engine (FP16)	ONNX	—	62.87%	37.87%	-0.83	12.26	216.9	v-733 · 2026 Q2
Small	Apple M2 Max — CoreML Metal GPU (FP16)	ONNX	—	62.88%	37.82%	-0.88	26.14	131.0	v-73d · 2026 Q2
Small	Apple M2 Max — CoreML CPU (FP16)	ONNX	—	63.83%	38.33%	-0.37	60.62	35.2	v-9e5 · 2026 Q2
Small	Apple iPhone 17 Pro — CoreML Neural Engine (FP16)	ONNX	—	63.85%	38.39%	-0.31	22.67	125.7	v-f72 · 2026 Q2
Small	Apple iPhone 17 Pro — CoreML Metal GPU (FP16)	ONNX	—	63.84%	38.33%	-0.37	40.78	60.3	v-f73 · 2026 Q2
Small	Apple iPhone 17 Pro — CoreML CPU (FP16)	ONNX	—	63.83%	38.31%	-0.39	91.96	24.0	v-f71 · 2026 Q2
Small	Apple iPhone 15 Pro — CoreML Neural Engine (FP16)	ONNX	—	63.84%	38.41%	-0.29	31.72	109.1	v-f3f · 2026 Q2
Small	Apple iPhone 15 Pro — CoreML Metal GPU (FP16)	ONNX	—	63.84%	38.33%	-0.37	78.20	28.0	v-f42 · 2026 Q2
Small	Apple iPhone 15 Pro — CoreML CPU (FP16)	ONNX	—	63.82%	38.31%	-0.39	109.93	20.3	v-f04 · 2026 Q2
Small	Samsung Galaxy S26 Ultra — Qualcomm Hexagon NPU (INT8)	ONNX · QNN EP	Smart	55.70%	32.43%	-6.27	31.27	114.0	v-10b3 · 2026 Q2
Small	Samsung Galaxy S26 Ultra — Qualcomm Hexagon NPU (INT8)	ONNX · QNN EP	Logical	22.22%	14.39%	-24.31	11.72	326.8	v-10b5 · 2026 Q2
Small	Samsung Galaxy S26 Ultra — Qualcomm Hexagon NPU (INT16)	ONNX · QNN EP	Smart	60.93%	36.14%	-2.56	37.89	104.5	v-10af · 2026 Q2
Small	Samsung Galaxy S26 Ultra — Qualcomm Hexagon NPU (INT16)	ONNX · QNN EP	Logical	59.97%	11.49%	-27.21	24.84	155.9	v-10b1 · 2026 Q2
Small	Samsung Galaxy S26 Ultra — CPU	LiteRT	Smart	55.10%	29.97%	-8.73	226.23	29.3	v-101d · 2026 Q2
Small	NXP i.MX 8M Plus + VeriSilicon NPU (Ezurio) — latency	LiteRT	Logical	37.22%	19.00%	-19.71	508.12	3.9	v-1ad3
Small	NXP i.MX 8M Plus + VeriSilicon NPU (FRDM)	LiteRT	Combined	7.16%	4.73%	-33.98	255.78	4.0	v-18eb
Small	NXP i.MX 8M Plus + VeriSilicon NPU (FRDM)	LiteRT	Logical	37.22%	19.00%	-19.71	263.91	4.0	v-1904
Small	NXP i.MX 8M Plus + VeriSilicon NPU (FRDM)	LiteRT	Smart	41.27%	21.09%	-17.62 ⚠	282.47	4.0	v-1960
Small	NXP i.MX 8M Plus + VeriSilicon NPU (Verdin) — throughput	LiteRT	Smart	40.38%	20.69%	-18.01 ⚠	297.99	3.9	v-c9a · 2026 Q2
Small	NXP i.MX 95 + eIQ Neutron NPU (Ezurio) — latency	LiteRT	Smart	54.48%	29.72%	-8.99	114.63	12.1	v-16c9
Small	NXP i.MX 95 + eIQ Neutron NPU (Ezurio) — throughput	LiteRT	Smart	54.48%	29.72%	-8.99	281.40	19.5	v-199d
Small	NXP i.MX 95 + eIQ Neutron NPU (EVK) — latency	LiteRT	Smart	54.48%	29.88%	-8.83	119.43	11.5	v-18f4
Small	NXP i.MX 95 + eIQ Neutron NPU (EVK) — latency	LiteRT	Logical	50.45%	27.51%	-11.20	110.47	10.2	v-18e1
Small	NXP i.MX 95 + eIQ Neutron NPU (EVK) — latency	LiteRT	Combined	15.15%	9.44%	-29.27	110.86	9.7	v-18cc
Small	NXP i.MX 95 + eIQ Neutron NPU (EVK) — throughput	LiteRT	Smart	54.48%	29.88%	-8.83	274.95	19.2	v-18fb
Small	NXP i.MX 95 + eIQ Neutron NPU (EVK) — throughput	LiteRT	Logical	50.45%	27.51%	-11.20	209.46	21.5	v-18ee
Small	NXP i.MX 95 + eIQ Neutron NPU (EVK) — throughput	LiteRT	Combined	15.15%	9.44%	-29.27	181.24	23.4	v-18dc
Small	NXP i.MX 95 + eIQ Neutron NPU (Phytec) — throughput	LiteRT	Smart	54.48%	29.88%	-8.83	266.17	19.5	v-185c
Small	NXP i.MX 95 + eIQ Neutron NPU (Verdin) — latency	LiteRT	Smart	54.48%	29.72%	-8.99	121.32	11.7	v-16d6
Small	NXP i.MX 95 + eIQ Neutron NPU (Verdin) — throughput	LiteRT	Smart	54.48%	29.72%	-8.99	296.34	18.4	v-19b4
Small	NXP Ara240 (FRDM) — latency	Ara DVM	Smart	51.15%	27.51%	-11.20 ⚠	40.63	46.2	v-157a
Small	NXP Ara240 (FRDM) — throughput	Ara DVM	Smart	51.14%	27.50%	-11.21 ⚠	51.48	70.6	v-18fc
Small	Raspberry Pi 5 + Hailo-8L NPU	Hailo HEF	—	57.40%	32.68%	-6.03	69.95	16.0	v-15a3
Small	NVIDIA Jetson Orin Nano (TensorRT FP16)	TensorRT	—	64.47%	38.73%	+0.02	65.50	108.4	v-191d
Small	NVIDIA Jetson Orin Nano (TensorRT INT8)	TensorRT	—	45.54%	22.99%	-15.72 ⚠	168.78	35.1	v-191f
Small	Qualcomm Dragonwing IQ-9075 — Hexagon NPU (INT8)	ONNX · QNN EP	Smart	62.74%	37.24%	-1.47	23.17	199.4	v-1680
Small	Qualcomm Dragonwing IQ-9075 — Hexagon NPU (INT8)	ONNX · QNN EP	Logical	60.01%	36.00%	-2.71	20.87	261.1	v-167e
Small	Qualcomm Dragonwing IQ-9075 — Hexagon NPU (INT16)	ONNX · QNN EP	Smart	64.30%	38.70%	-0.01	30.93	126.8	v-1681
Medium	ONNX FP32 (AWS Graviton · 4-core)	ONNX	—	69.91%	42.50%	+0.02	3255.13	1.2	v-ede · 2026 Q2
Medium	ONNX FP32 (AWS Graviton4 · 48-core)	ONNX	—	69.91%	42.50%	+0.02	865.56	14.9	v-ef7 · 2026 Q2
Medium	ONNX FP32 (AWS Graviton4 · 8-core)	ONNX	—	69.91%	42.50%	+0.02	2690.32	3.0	v-ef3 · 2026 Q2
Medium	ONNX FP32 (Intel Core i9-13900F · 32-core)	ONNX	—	69.92%	42.48%	+0.00	398.99	7.6	v-a59 · 2026 Q2
Medium	ONNX FP32 (Intel Xeon Platinum 8488C · 24-core)	ONNX	—	69.92%	42.48%	+0.00	738.99	17.7	v-ecb · 2026 Q2
Medium	ONNX FP32 (Intel Xeon Platinum 8488C · 4-core)	ONNX	—	69.92%	42.48%	+0.00	1750.62	4.6	v-ec3 · 2026 Q2
Medium	ONNX FP32 (CUDA · A10G)	ONNX	—	69.92%	42.48%	ref	47.31	101.1	v-eb4 · 2026 Q2
Medium	ONNX FP32 (CUDA · RTX 4060)	ONNX	—	69.92%	42.48%	+0.00	61.92	61.3	v-a9b · 2026 Q2
Medium	ONNX FP16 (CUDA · RTX 4060)	ONNX	—	69.87%	42.45%	-0.03	38.76	109.6	v-ab0 · 2026 Q2
Medium	ONNX FP32 (CUDA · RTX 3090)	ONNX	—	69.85%	42.48%	ref	39.14	124.6	v-1964
Medium	ONNX FP16 (CUDA · RTX 3090)	ONNX	—	69.83%	42.48%	+0.00	27.83	196.8	v-19bb
Medium	Apple M2 Max — CoreML Neural Engine (FP16)	ONNX	—	67.21%	40.81%	-1.67	30.85	73.7	v-734 · 2026 Q2
Medium	Apple M2 Max — CoreML Metal GPU (FP16)	ONNX	—	68.03%	41.17%	-1.31	71.15	44.7	v-9e3 · 2026 Q2
Medium	Apple M2 Max — CoreML CPU (FP16)	ONNX	—	68.02%	41.23%	-1.25	127.41	16.1	v-9e2 · 2026 Q2
Medium	Apple iPhone 17 Pro — CoreML Neural Engine (FP16)	ONNX	—	68.00%	41.29%	-1.19	40.86	55.4	v-f79 · 2026 Q2
Medium	Apple iPhone 17 Pro — CoreML Metal GPU (FP16)	ONNX	—	68.04%	41.17%	-1.31	101.27	20.7	v-f7b · 2026 Q2
Medium	Apple iPhone 17 Pro — CoreML CPU (FP16)	ONNX	—	68.02%	41.22%	-1.26	217.41	9.6	v-f7c · 2026 Q2
Medium	Apple iPhone 15 Pro — CoreML Neural Engine (FP16)	ONNX	—	68.00%	41.30%	-1.18	49.26	46.7	v-f5d · 2026 Q2
Medium	Apple iPhone 15 Pro — CoreML Metal GPU (FP16)	ONNX	—	68.03%	41.17%	-1.31	223.18	9.4	v-f65 · 2026 Q2
Medium	Apple iPhone 15 Pro — CoreML CPU (FP16)	ONNX	—	68.06%	41.22%	-1.26	273.25	7.6	v-f07 · 2026 Q2
Medium	Samsung Galaxy S26 Ultra — Qualcomm Hexagon NPU (INT8)	ONNX · QNN EP	Smart	63.20%	35.65%	-6.83	37.80	102.3	v-10bb · 2026 Q2
Medium	Samsung Galaxy S26 Ultra — Qualcomm Hexagon NPU (INT16)	ONNX · QNN EP	Smart	66.44%	39.70%	-2.78	51.27	73.7	v-10b7 · 2026 Q2
Medium	Samsung Galaxy S26 Ultra — Qualcomm Hexagon NPU (INT16)	ONNX · QNN EP	Logical	65.52%	13.85%	-28.63	39.31	82.5	v-10b9 · 2026 Q2
Medium	Samsung Galaxy S26 Ultra — CPU	LiteRT	Smart	65.80%	38.12%	-4.36	530.26	11.8	v-1023 · 2026 Q2
Medium	NXP i.MX 8M Plus + VeriSilicon NPU (Ezurio) — latency	LiteRT	Logical	59.62%	32.93%	-9.55	729.15	2.3	v-1b38
Medium	NXP i.MX 8M Plus + VeriSilicon NPU (FRDM)	LiteRT	Combined	15.33%	10.24%	-32.24	450.82	2.3	v-19c3
Medium	NXP i.MX 8M Plus + VeriSilicon NPU (FRDM)	LiteRT	Logical	59.62%	32.93%	-9.55	460.62	2.2	v-1a1d
Medium	NXP i.MX 8M Plus + VeriSilicon NPU (FRDM)	LiteRT	Smart	64.16%	35.13%	-7.35	484.57	2.3	v-1a51
Medium	NXP i.MX 8M Plus + VeriSilicon NPU (Verdin) — latency	LiteRT	Logical	14.49%	9.80%	-32.68	462.81	2.2	v-cab · 2026 Q2
Medium	NXP i.MX 8M Plus + VeriSilicon NPU (Verdin) — throughput	LiteRT	Smart	61.28%	33.54%	-8.94	506.17	2.2	v-caa · 2026 Q2
Medium	NXP Ara240 (FRDM) — latency	Ara DVM	Smart	62.81%	28.28%	-14.20 ⚠	63.73	23.1	v-1587
Medium	NXP Ara240 (FRDM) — throughput	Ara DVM	Smart	62.79%	28.26%	-14.22 ⚠	55.96	27.8	v-18fe
Medium	Raspberry Pi 5 + Hailo-8L NPU	Hailo HEF	—	65.43%	37.88%	-4.60	117.27	9.2	v-15b6
Medium	NVIDIA Jetson Orin Nano (TensorRT FP16)	TensorRT	—	69.88%	42.50%	+0.02	90.46	52.8	v-15a5
Medium	NVIDIA Jetson Orin Nano (TensorRT INT8)	TensorRT	—	66.32%	34.73%	-7.75	65.85	83.9	v-15aa
Medium	Qualcomm Dragonwing IQ-9075 — Hexagon NPU (INT8)	ONNX · QNN EP	Smart	68.37%	41.33%	-1.15	29.39	155.0	v-1695
Medium	Qualcomm Dragonwing IQ-9075 — Hexagon NPU (INT8)	ONNX · QNN EP	Logical	65.26%	39.74%	-2.74	22.00	150.9	v-1693
Medium	Qualcomm Dragonwing IQ-9075 — Hexagon NPU (INT16)	ONNX · QNN EP	Smart	69.73%	42.52%	+0.04	47.88	59.0	v-1697

⚠ Below expectations — under investigation. The rows marked ⚠ above measure more than 10 percentage points below the same training session's float reference: the model accuracy on that platform is below our expectations. We publish the measured numbers rather than hiding them, and we are investigating the results to make improvements — the next snapshot of this card will reflect any recovered accuracy.

---

Validation pipeline

These results are produced by the EdgeFirst on-target validation pipeline:

1. EdgeFirst Profiler runs on the target hardware, executes the full inference pipeline (capture → preprocess → inference → postprocess), and scores the predictions against ground truth on the device. COCO accuracy and every timing block are computed in-process — there is no Python and no pycocotools on the target. It emits per-image predictions in EdgeFirst Arrow/Parquet, a Perfetto trace, and the computed metrics.
2. EdgeFirst Studio receives the metrics, predictions, charts and trace, and publishes them as the v-XXXX validation session every row above cites. Studio is where results are published, compared and browsed — it is not where they are computed.
3. EdgeFirst HAL (open source) provides the hardware-accelerated preprocessing and post-decoding primitives used at both validation and deployment time, so the timings measured here reflect the same accelerated paths a production runtime would take.

End-to-end latency runs from the moment a frame is available to the moment its results are ready — preprocessing, inference, and postprocessing. Image acquisition (camera capture, or file load and JPEG decode), mask encoding and writing results to disk are excluded. The per-stage breakdown of every row is on its linked Studio session.

Realized FPS is the measured steady-state rate at which final results are emitted, measured directly from the profiler's per-frame result-emission timestamps over the steady-state stream — trace-independent; the Perfetto trace's own FPS is used only as a fallback on sessions where that scalar isn't available. It generally exceeds 1000 / end-to-end because the runtime overlaps stages across frames.

See EdgeFirst Studio for the full validation pipeline.

---

Downloads

Artifacts are organized by deployment target. Each model file embeds the EdgeFirst edgefirst.json metadata (training session, dataset version, calibration artifact, converter chain) so a single file is sufficient for deployment — no sidecar configuration required.

Every file below is the artifact a validation session in the tables above measured. Files are organized into per-target folders and follow the naming convention yolo26{size}-seg-{precision}[-smart|-logical][-end2end]{extension}.

Entries marked 2026 Q2 belong to rows carried from the 2026 Q2 edition: they download from the repository's 2026Q2 tag, the weights those rows were measured on. The same filename on main holds the current edition's artifact.

ONNX FP32 — Any platform with ONNX Runtime.

Size	File	Variant	Download
Nano	onnx/yolo26n-seg-fp16.onnx	FP16	Download
Nano	onnx/yolo26n-seg-fp16.onnx	FP16 · 2026 Q2	Download
Nano	onnx/yolo26n-seg-fp32.onnx	FP32	Download
Nano	onnx/yolo26n-seg-fp32.onnx	FP32 · 2026 Q2	Download
Small	onnx/yolo26s-seg-fp16.onnx	FP16	Download
Small	onnx/yolo26s-seg-fp16.onnx	FP16 · 2026 Q2	Download
Small	onnx/yolo26s-seg-fp32.onnx	FP32	Download
Small	onnx/yolo26s-seg-fp32.onnx	FP32 · 2026 Q2	Download
Medium	onnx/yolo26m-seg-fp16.onnx	FP16	Download
Medium	onnx/yolo26m-seg-fp16.onnx	FP16 · 2026 Q2	Download
Medium	onnx/yolo26m-seg-fp32.onnx	FP32	Download
Medium	onnx/yolo26m-seg-fp32.onnx	FP32 · 2026 Q2	Download

TFLite INT8 — CPU or NPU via runtime delegate (NXP i.MX 8M Plus VX Delegate).

Size	File	Variant	Download
Nano	tflite/yolo26n-seg-int8-smart.tflite	Smart · INT8	Download
Nano	tflite/yolo26n-seg-int8-smart.tflite	Smart · INT8 · 2026 Q2	Download
Nano	tflite/yolo26n-seg-int8.tflite	Logical · INT8	Download
Nano	tflite/yolo26n-seg-int8.tflite	Logical · INT8 · 2026 Q2	Download
Small	tflite/yolo26s-seg-int8-smart.tflite	Smart · INT8	Download
Small	tflite/yolo26s-seg-int8-smart.tflite	Smart · INT8 · 2026 Q2	Download
Small	tflite/yolo26s-seg-int8.tflite	Logical · INT8	Download
Medium	tflite/yolo26m-seg-int8-smart.tflite	Smart · INT8	Download
Medium	tflite/yolo26m-seg-int8-smart.tflite	Smart · INT8 · 2026 Q2	Download
Medium	tflite/yolo26m-seg-int8.tflite	Logical · INT8	Download
Medium	tflite/yolo26m-seg-int8.tflite	Logical · INT8 · 2026 Q2	Download

NXP i.MX 95 (eIQ Neutron) — eIQ Neutron NPU optimized.

Size	File	Variant	Download
Nano	imx95/yolo26n-seg-int8-smart.imx95.tflite	Smart · INT8	Download
Nano	imx95/yolo26n-seg-int8.imx95.tflite	Logical · INT8	Download
Small	imx95/yolo26s-seg-int8-smart.imx95.tflite	Smart · INT8	Download
Small	imx95/yolo26s-seg-int8.imx95.tflite	Logical · INT8	Download

NXP Ara240 — Ara240 DNPU compiled model.

Size	File	Variant	Download
Nano	ara240/yolo26n-seg-int16.dvm	Smart · INT16	Download
Small	ara240/yolo26s-seg-int16.dvm	Smart · INT16	Download
Medium	ara240/yolo26m-seg-int16.dvm	Smart · INT16	Download

RPi5 + Hailo-8L (13 TOPS) — Hailo-8L 13 TOPS accelerator.

Size	File	Variant	Download
Nano	hailo/yolo26n-seg-int8.hailo8l.hef	INT8	Download
Small	hailo/yolo26s-seg-int8.hailo8l.hef	INT8	Download
Medium	hailo/yolo26m-seg-int8.hailo8l.hef	INT8	Download

NVIDIA Jetson (TensorRT) — Jetson FP16 and INT8 engines.

Size	File	Variant	Download
Nano	jetson/yolo26n-seg-fp16.engine	FP16	Download
Nano	jetson/yolo26n-seg-int8.engine	INT8	Download
Small	jetson/yolo26s-seg-fp16.engine	FP16	Download
Small	jetson/yolo26s-seg-int8.engine	INT8	Download
Medium	jetson/yolo26m-seg-fp16.engine	FP16	Download
Medium	jetson/yolo26m-seg-int8.engine	INT8	Download

Qualcomm Snapdragon 8 Elite Gen 5 (Hexagon v81) — Offline-compiled Hexagon context binary, run through the ONNX Runtime QNN execution provider. Loads only on the Snapdragon 8 Elite Gen 5 (Hexagon v81).

Size	File	Variant	Download
Nano	qnn/yolo26n-seg-int16-logical.htp-v81.qnn.onnx	Logical · INT16 · 2026 Q2	Download
Nano	qnn/yolo26n-seg-int16-smart.htp-v81.qnn.onnx	Smart · INT16 · 2026 Q2	Download
Nano	qnn/yolo26n-seg-int8-logical.htp-v81.qnn.onnx	Logical · INT8 · 2026 Q2	Download
Nano	qnn/yolo26n-seg-int8-smart.htp-v81.qnn.onnx	Smart · INT8 · 2026 Q2	Download
Small	qnn/yolo26s-seg-int16-logical.htp-v81.qnn.onnx	Logical · INT16 · 2026 Q2	Download
Small	qnn/yolo26s-seg-int16-smart.htp-v81.qnn.onnx	Smart · INT16 · 2026 Q2	Download
Small	qnn/yolo26s-seg-int8-logical.htp-v81.qnn.onnx	Logical · INT8 · 2026 Q2	Download
Small	qnn/yolo26s-seg-int8-smart.htp-v81.qnn.onnx	Smart · INT8 · 2026 Q2	Download
Medium	qnn/yolo26m-seg-int16-logical.htp-v81.qnn.onnx	Logical · INT16 · 2026 Q2	Download
Medium	qnn/yolo26m-seg-int16-smart.htp-v81.qnn.onnx	Smart · INT16 · 2026 Q2	Download
Medium	qnn/yolo26m-seg-int8-smart.htp-v81.qnn.onnx	Smart · INT8 · 2026 Q2	Download

Qualcomm Dragonwing IQ-9075 (Hexagon v73) — Offline-compiled Hexagon context binary, run through the ONNX Runtime QNN execution provider. Loads only on the Dragonwing IQ-9075 (Hexagon v73).

Size	File	Variant	Download
Nano	qnn/yolo26n-seg-int16-smart.iq9075.qnn.onnx	Smart · INT16	Download
Nano	qnn/yolo26n-seg-int8-logical.iq9075.qnn.onnx	Logical · INT8	Download
Nano	qnn/yolo26n-seg-int8-smart.iq9075.qnn.onnx	Smart · INT8	Download
Small	qnn/yolo26s-seg-int16-smart.iq9075.qnn.onnx	Smart · INT16	Download
Small	qnn/yolo26s-seg-int8-logical.iq9075.qnn.onnx	Logical · INT8	Download
Small	qnn/yolo26s-seg-int8-smart.iq9075.qnn.onnx	Smart · INT8	Download
Medium	qnn/yolo26m-seg-int16-smart.iq9075.qnn.onnx	Smart · INT16	Download
Medium	qnn/yolo26m-seg-int8-logical.iq9075.qnn.onnx	Logical · INT8	Download
Medium	qnn/yolo26m-seg-int8-smart.iq9075.qnn.onnx	Smart · INT8	Download

---

Inference example (Python)

from edgefirst.hal import Model, TensorImage

# Load the model — embedded edgefirst.json carries labels and decoder config
model = Model("yolo26n-seg-int8.tflite")

# Run inference on an image
image = TensorImage.from_file("image.jpg")
results = model.predict(image)

# Iterate detections
for det in results.detections:
    print(f"{det.label}: {det.confidence:.2f} at {det.bbox}")
# Segmentation models also return one per-instance binary mask per
# detection (a H×W array thresholded at 128), decoded from the prototype masks
# and mask coefficients. See the EdgeFirst HAL mask materialization / overlay
# helpers for accessing and drawing them.

EdgeFirst HAL

Traceability

Every measurement in the tables above is reachable through the EdgeFirst Studio validation framework. The v-XXXX Source link on each row resolves to a public Studio URL of the form:

https://edgefirst.studio/public/validation/v-XXXX/details?mode=charts

The link lands on the Charts view — live system traces (CPU, memory, temperature, power) and per-stage timing recorded during the validation run. The Info and Metrics tabs on the same page carry the configuration and full COCO metric breakdown.

From there, the full provenance chain is one click deeper: training session ID, dataset version, calibration artifact, converter chain (e.g. TFLite quantizer + Neutron compile), validation parameters, and the host hardware description (hostname, kernel version, SoC, NPU, profiler version). The same model file you download from this repository embeds the same chain in its edgefirst.json metadata.

---

See also

Other model families in the EdgeFirst Model Zoo:

Model	Task	Link
YOLOv5 Detection	Detection	EdgeFirst/yolov5-det
YOLOv8 Detection	Detection	EdgeFirst/yolov8-det
YOLOv8 Segmentation	Segmentation	EdgeFirst/yolov8-seg
YOLO11 Detection	Detection	EdgeFirst/yolo11-det
YOLO11 Segmentation	Segmentation	EdgeFirst/yolo11-seg
YOLO26 Detection	Detection	EdgeFirst/yolo26-det

---

Train your own with EdgeFirst Studio

Train on your own dataset with EdgeFirst Studio:

• Free tier includes YOLO training with automatic INT8 quantization and edge deployment.
• Upload datasets via EdgeFirst Recorder or COCO/YOLO format.
• AI-assisted annotation with auto-labeling.
• CameraAdaptor integration for native sensor format training.
• Deploy trained models to edge devices via EdgeFirst Client.

---

Technical notes

Quantization pipeline

All TFLite INT8 models are produced by EdgeFirst's quantization pipeline (details):

1. ONNX export — standard Ultralytics export with simplify=True
2. TF-wrapped ONNX — box coordinates normalized to [0, 1] inside DFL decode
3. Split decoder — boxes, scores, and mask coefficients split into separate output tensors so each receives an independent INT8 quantization scale
4. Smart calibration — calibration samples selected via greedy coverage maximization; the artifact is content-addressed by parameter hash and cached in Studio for deterministic reuse
5. Full integer INT8 — uint8 input, int8 output, MLIR quantizer

Split decoder output format

Segmentation (e.g. yolo26n-seg):

• boxes — (1, 4, 8400) normalized [0, 1] coordinates
• scores — (1, 80, 8400) per-class probabilities
• mask_coefs — (1, 32, 8400) per-anchor mask coefficients
• protos — (1, 160, 160, 32) prototype masks

Each tensor has its own quantization scale and zero point. The EdgeFirst HAL handles dequantization and reassembly automatically; no application code change is required across NPU targets.

Embedded metadata

• TFLite: edgefirst.json and labels.txt embedded in the ZIP-format model file
• ONNX: edgefirst.json embedded in model.metadata_props

No sidecar files required; the model artifact is self-contained.

---

Limitations

• COCO bias — models trained on COCO (80 classes) inherit the dataset's biases (Western-centric scenes, particular object distributions, limited weather/lighting diversity).
• Quantization loss — integer quantization introduces accuracy loss relative to FP32: INT8 on the NXP i.MX 8M Plus / i.MX 95 Neutron and Hailo NPUs, and a mixed INT8/INT16 scheme on the NXP Ara240 (the box-regression path is promoted to INT16 for localization accuracy). The magnitude per platform is shown in the Δ vs FP32 column above.
• Configurations under active investigation — a subset of INT8 results measure below expectations and are marked ⚠ above; these are tracked for resolution, not accepted as final. The main cases are YOLO11 / YOLO26 on the NXP i.MX 8M Plus VeriSilicon NPU (the most constrained accelerator, where the newer architectures quantize poorly) and some NXP Ara240 segmentation runs. YOLO11 / YOLO26 on the NXP i.MX 95 eIQ Neutron NPU are not yet supported (a delegate limitation) and render without numbers. Each next card snapshot reflects any recovered accuracy.
• Input resolution — all models expect 640×640 input; other resolutions require letterboxing.

---

License

Model weights in this repository are derived from Ultralytics YOLO and remain © Ultralytics Inc., licensed AGPL-3.0 — use requires AGPL-3.0 compliance or an Ultralytics Enterprise License.

The validation results, this model card, and its metadata are Au-Zone Technologies' own contribution, licensed CC BY-NC 4.0 (Attribution — NonCommercial) — see the repository LICENSE for the full text and citation requirements.

---

Citation

@software{edgefirst_yolo26_seg,
  title = { {YOLO26 Segmentation — EdgeFirst Model Zoo} },
  author = {Au-Zone Technologies},
  url = {https://huggingface.co/EdgeFirst/yolo26-seg},
  year = {2026},
  license = {CC-BY-NC-4.0},
}

---

_{EdgeFirst Studio · GitHub · Docs · Au-Zone Technologies
Model weights © Ultralytics Inc. (AGPL-3.0) · Validation results & card © 2026 Au-Zone Technologies (CC BY-NC 4.0)
NXP^®, i.MX, eIQ^®, Neutron, and Ara240 are trademarks or products of NXP Semiconductors. Hailo is a trademark of Hailo Technologies Ltd. Jetson is a trademark of NVIDIA Corporation. All other trademarks are the property of their respective owners.}